V is a Verilog file format that stores source code. Verilog language was created for tasks such as modeling and simulating electronic systems. Verilog is a hardware description language (HDL). Until 2001 it was a low-level programming language not yet standardized. In later years, syntax has been improved and high-level features have been added to Verilog language.

V file stores code that defines a module. Modules use always and initial commands. Verilog uses instructions that implement many typical statements used in higher-level programming languages (assignment, function call, loop, etc.)